Implementation of Power Efficient Decoding Algorithm for LDPC Code
نویسندگان
چکیده
Mobile computing devices like mobile, laptops& tablets that covered large market of end user facing battery issues is an open challenge for research scholars. In this project work I have attempt to optimize power [batteries relate issues] at decoding. Stare of most efficient error control LDPC code which is being used. In this work bit flipping decoder hard decision decoding is used which can be implemented by using 8 transistor by using XOR gate. This paper proposed 6 transistor XOR gate design and implemented which can be used in this decoder.
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